The DVB-S2/S2X Receiver IP core is a complete solution to implement the core functions of a receiver compliant with the CCSDS 131.3-B standard and partially compliant to those defined in the ETSI 302 307-1 (DVB-S2) standard. This transmission system has been conceived for Low Earth Observation mission with high data rate (more than 2 Gbps), and its primary application is to provide a complete solution for the implementation of a low-cost receiver based on commercial FPGAs to be used into the Ground Stations (Downlink application).
The main functions covered by the IP Core include the signal processing of the I/Q digital baseband signal, carrier frequency and phase recovery, timing recovery, demodulation of all the Modulation and Coding formats (ModCods) from QPSK to 8PSK and 16-, 32-APSK, and decoding based on Low-Density Parity Check (LDPC) and Bose-Chaudhari-Hocquenghem (BCH) codes. Optionally, the IP Core can be configured to extend the number of codes to support an increased number of code rates and higher order modulations such as 64-, 128-, and 256-APSK as per the ETSI 302 307-2 (DVB-S2x) standard. The VL-SNR feature of DVB-S2X is currently not supported.