ECC Accelerator Suite

Keywords: ASIC, Asymmetric-key cryptography, Asymmetric-key encryption, Cybersecurity, ECC, ECDH, ECDSA, ECIES, ECMQV, Elliptic curve arithmetic, FPGA, IP Core, NIST P-256, NIST P-521

The ECC Accelerator Suite is our IP Core dedicated to accelerate asymmetric-key cryptographic schemes based on Elliptic-Curve Cryptography (ECC) and ECC arithmetic operations.

The ECC Accelerator Suite is able to support both the 256-bit elliptic curve NIST P-256 and the 521-bit elliptic curve NIST P-521, and enables security services as key exchange, digital signature and asymmetric-key encryption.

The ECC Accelerator Suite engine can be used to perform elliptic curve arithmetic primitives (i.e., Point Addition, Point Doubling, Point on Curve and Point Multiplication), higher-level elliptic curve operations (i.e., key pair generation and asymmetric key generation) and all the functions of the ECDSA scheme on the elliptic curve. This means that the ECC Accelerator Suite engine supports all the arithmetic operations required in ECDSA generation and verification process, except the generation of the digest of the message whose the digital signature must be generated/verified.

In addition, the functionalities provided by the ECC Accelerator Suite engine enable other high-level schemes and protocols based on ECC such as Elliptic Curve Integrated Encryption Scheme (ECIES), Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Menezes-Qu-Vanstone (ECMQV).

Key features

  • Simple host interface or AMBA AXI bus interface (on request)
  • Built in self-test for failure detection
  • Low latency and high throughput solution for asymmetric-key cryptography based on elliptic curves
  • Support to secp256r1 and secp521r1 curves (NIST P-256 and NIST P-521)
  • Configurable ECC suite according to application specifications (resources saving)
  • Supported asymmetric-key schemes (ECDSA-ECIES-ECDH)

Other information



  • FPGA/ASIC design
  • IP Core design
  • Verification

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